基于自适应衬偏补偿和交流增强的超大面阵红外探测器高线性高速读出电路研究

Research on high-linearity and high-speed readout circuit of ultra-large array infrared detector based on adaptive body-bias compensation and AC enhancement

摘要:

针对超大面阵红外探测器读出过程中存在的线性度和帧频受限问题,提出一种可实现高速高线性读出的解决方案,采用像素内高效相关双采样（correlated double sampling,CDS）方法优化读出电路噪声特性,并输出CDS电压至列总线；通过交流增强技术实现对列总线寄生电容的快速建立,同时在列总线终端采用自适应衬偏补偿方法消除像素源极跟随器带来的非线性。基于55 nm工艺在低温110 K下的8 192×8 192面阵红外探测器读出电路中进行全面实验验证,结果表明,相较于传统读出电路,输出摆幅从2 V提升至3.3 V,满阱容量从4.3 Me^-提升为6 Me^-,行时间从20 μs减小为2 μs,线性度从96.9%提升至99.98%。芯片整体功耗为1.6 W,读出优化电路在加速读出模式下的单列功耗为33 μW,非线性校正模式下为16.5 μW。

Abstract:

In order to solve the problem of limited linearity and frame rate in the ultra-large array infrared (IR) detector readout process, this paper proposed a high-speed and high-linearity readout method. The readout circuit noise characteristics were optimized by adopting an efficient correlated double sampling (CDS) method within pixels, and the CDS voltage was output to the column bus. By employing an alternating current (AC) enhancement technique, the parasitic capacitance of the column bus was rapidly settled, while an adaptive body-bias compensation method was applied at the column bus termination to eliminate the nonlinearity introduced by the pixel source follower. A comprehensive experimental verification was conducted in the readout circuit of an 8 192 × 8 192 array IR detector based on the 55 nm process at a low temperature of 110 K. The results show that in comparison with a traditional readout circuit, the output swing is increased from 2 V to 3.3 V, and the full-well capacity is increased from 4.3 Me- to 6 Me-. The row time is reduced from 20 μs to 2 μs, and the linearity is improved from 96.9% to 99.98%. The overall power consumption of the chip is 1.6 W, and single column power consumption of the readout optimization circuit is 33 μW in the accelerated readout mode and 16.5 μW in the nonlinear correction mode.