结合用户约束文件的高效多FPGA系统分割方法

An efficient partitioning method with UCF for a multi-FPGA system

摘要:

针对单个现场可编程门阵列(Field Programmable Gate Array,FPGA)可配置逻辑模块(Configurable Logic Block,CLB)和输入／输出(I／O)数目受限难以满足大规模复杂电路系统设计需要的问题,提出了一种结合用户约束文件(User Constraint File,UCF)和单个FPGA的EDA(Electronic Design Automation)设计流程,通过部分人为干涉,对多FPGA(multi-FPGA)系统进行分割的方法．应用这种分割方法,可以提高multi-FPGA系统的划分效率,简化设计的复杂度．结果表明：基于这种分割方法的分割工具,结合multi-FPGA系统的硬件结构,可实现一个最多为9芯片multi-FPGA系统的设计和配置．

Abstract:

FPGA has fixed number of I／O or CLB, which resulting in a limitation to the implementation of a very large complex system in a single FPGA. This paper addresses a partitioning method used for a multi-FPGA system implementation with partly guidance of User Constraint File and FPGA EDA flow. The partitioning method can improve the partitioning efficiency, and reduce the complexity of a multi-FPGA system design. Based on the proposed method and the multi-FPGA system architecture, a partitioning tool was implemented, which has the capability of designing a nine-chip multi-FPGA system.